Avago expands family of world’s smallest RF amplifiers

SAN JOSE, USA & SINGAPORE: Avago Technologies announced additions to its family of the market’s smallest RF amplifiers. The new VMMK-3xxx amplifiers leverage Avago WaferCap chip scale packaging (CSP) technology to offer an ultra-small footprint of 1.0 by 0.5 by 0.25 mm. The amplifiers bring a host of new functionality to the existing Avago VMMK-1xxx and VMMK-2xxx families, including a positive gain slope low-noise amplifier (LNA), a wideband LNA, a variable gain amplifier (VGA), and four directional detectors.

With miniature 0402 package dimensions and no wirebonds, the VMMK-3xxx amplifiers experience almost no signal loss and minimal parasitics. The devices take up 5 percent of the volume and uses only 10 percent of the board area of solutions using a standard SOT-343 package. In some cases, the miniature amplifiers can effectively reduce PCB area by more than 50 percent.

The ultra-small package size and fully-matched surface mount design are optimized for 500 MHz to 12 GHz frequencies, making the high-performance devices ideal for a variety of radio architectures and space-constrained applications. The VMMK-3xxx LNAs and VGA can be used in UWB, WLAN, WiMAX, generic IF amp and gain block applications, while the new detectors can be used in base stations, point-to-point radios and generic power control loop detectors, as well as for monitoring power amplifier output.

The VMMK-3xxx family supports full surface mount capability, requiring no special tooling for assembly. The amplifiers have all I/Os routed to the backside of the device wafer through via-holes, resulting in RF transitions suffering almost no signal loss and minimal parasitics. This is a significant improvement over conventional plastic packages where bond-wires exhibit substantial parasitics that limit the operating frequency.

The miniature amplifier family provides high gain, a high third-order intercept point (IP3) for good linearity, low noise figure (NF) and integrated 50-ohm input and output matching networks to simplify system design.