Tektronix delivers first LPDDR4 PHY layer test solution

USA: Tektronix Inc. announced the industry’s first complete PHY layer and conformance test solution for JEDEC LPDDR4, the next generation of mobile memory technology.

Slated for adoption starting in 2015, LPDDR4 builds on the current generation of LPDDR3 technology and will deliver improved data rates up to 4.26 Gb/sec and use an ultra-low voltage core to reduce power consumption by approximately 35 percent to enhance performance in mobile devices like smartphones, wearables & tablets.

LPDDR4 introduces new test and measurement challenges due to lower input/output voltage of just 1.1V, higher data rates and compact mechanical designs that limit access to test points. There are also multiple changes in Vref, read burst and write burst which further increase the complexity to perform the tests mandated by the JESD209-4 specification.

Tektronix provides the industry’s most complete set of tools design engineers need for qualifying their LPDDR4 designs. Through automated set-up and test execution, the Tektronix solution can reduce testing cycles from a week or more to a single hour.

"There’s no question that LPDDR4 makes validation far more complex and challenging for the entire mobile memory ecosystem, from silicon vendors to system integrators," said Brian Reich, GM, Performance Oscilloscopes, Tektronix.

“We offer the test and measurement tools needed to efficiently bring this exciting technology to market, from high-performance oscilloscopes and probes to advanced analysis software spanning the entire memory validation continuum."