TOKYO, JAPAN: Toshiba Corp. announced the development of Tunneling Field Effect Transistors (TFET) that utilize a new operating principle for ultra-low power MCU. This principle has been applied to the development of two different TFET using a CMOS platform compatible process. By applying each TFET into some circuit blocks, it is possible to achieve significant power reductions in MCUs.
Toshiba presented the TFETs on September 9th and 10th in three presentations at the 2014 Solid State Devices and Materials (SSDM) in Tsukuba, Japan. Two presentations were based on joint research with the Collaborative Research Team Green Nanoelectronics Center (GNC) at the National Institute of Advanced Industrial Science and Technology (AIST).
Rapid demand growth for wireless and mobile devices is driving demand for ultra-low power consumption of LSI. In this situation, innovative devices are strongly required to reduce operation voltage and stand-by leakage current. Tunneling Field Effect Transistor (TFET) utilizing operation novel principle with quantum tunneling effect has attracted much attention to achieve the ultra-low power LSI operation instead of conventional MOSFETs.
Recently, the introduction of new materials, such as III-V compound semiconductors, has been widely investigated for TFET, as they have the potential to realize high performance. However, it is difficult to implement such materials into current CMOS platforms, due to the difficulties resulting from special process utilization.